CHARM (Computer Hardware and Acceleration for Resource-Optimized, Model-Driven Systems) is a research group focused on performance-oriented system design across compute, network, and storage domains. Our work spans reconfigurable and fixed-function architectures, high-throughput hardware acceleration, and optimization techniques for modern cloud and datacenter platforms. We emphasize resource-aware design, applying analytical and machine-learning-based models to guide architectural decisions, task scheduling, and system-level tradeoffs. A core theme is programmable dataplane networking, including packet processing, switching, and SmartNIC/FPGA-based network functions. CHARM integrates low-level system control with high-level workload modeling to enable scalable, predictable, and energy-efficient computing infrastructure for data-intensive applications.